First generation miners from an organization being marginally higher than previous state of the art. | Steem-Bounty

i am still surprised(and glad) they hit it, and would not be shocked if there have been a lot of efficiencies to squeeze out.Interesting detail: world's most effective Bitcoin laborer @HalongMining dragonMint T1 could be a 10nm ASIC fabbed by Samsung Semiconductors." - Adam Back

I scan a piece oral communication that actual hash/joule ratios ar similar in each, marginally higher for Halong. one thing is odd. Halong has asicboost AND 10nm school and is merely marginally higher than antminers?

One doable answer is that algorithmic rule and ASIC style ar subpar however i am unsure what quantity are you able to gain, only if SHA2562 algorithms ar extensively acknowledged and ASIC improvement style choices ar typically created by algorithms (wild guess on my side)

Any physical science engineers within the room?

Competition is perhaps why the rise in potency is marginal. i would not be shocked if Halong is already capable of a major increase in potency with the 10nm circuits, however it's throttled therefore as to not hit the ceiling with their 1st product on the market.

I'm glad there's competition on the mining chips, i used to be obtaining uninterested in activity my head within the sand.

But my understanding is that the relative simplicity of SHA2562 create the implementation on ASICs straightforward, as in: no an excessive amount of space for improvement, perhaps 10-20%.

So even a mediocre implementation of each 10nm && AsicBoost ought to are manner higher. i am open for answers as a result of i do know I is wrong.

Maybe the AsicBoost half was poorly enforced, I detected there have been no a lot of asicboost blocks since 4/5 , this after all is variance, however not terribly doubtless.

The Antminer S3 had AN potency of zero.77 J/GH on a twenty eight nm method.

The Antminer S7 had AN potency of zero.25 J/GH on a twenty eight nm method.

Manufacturing method matters, however it isn't the foremost vital issue. ASICBOOST provides a 2 hundredth to half-hour boost in potency, however you'll be able to get larger edges from smart layout and style, low threshold voltage transistors, and every one of the opposite trade secrets that an honest style firm with a couple of years' expertise with SHA256d style would have.

HalongMining was able to get their 1st product to be slightly superior in potency to Bitmain's 5th-generation product. this can be somewhat spectacular. However, they did therefore employing a producing method that's regarding a pair of years newer than Bitmain's 5th-gen product, which is probably going to blame for most of the delta.

Quadratically, not exponentially. throughout every clock cycle, you have got to discharge and recharge the capacitors that kind the gates of the transistors. the quantity of charge that every condenser needs is proportional to the voltage. The energy needed by every condenser for every charge is proportional to the charge times the voltage, that is admire voltage square. If you are increasing the clockspeed also as voltage, then you get voltage cubed.

Exponentially suggests that one thing like 2x. Quadratic suggests that one thing like x2. there is a huge distinction between the 2.

Ye my bad, It's obtaining late up here in Scandinavian country. i used to be intermixture up power scaling as you justifiedly mentioned is cubed with frequency scaling. I meant to additionally add that required voltage for increase in frequency is exponential essentially instead of linear.

However it still does not modification the actual fact we won't decide the performance of the Halong ASIC till we all know all the metrics, their apparent lack of potency may simply come back from pushing the chips as way as doable, or it might be a under-performing design/node. If I bear in mind properly Samsung's 10nm node is nearer to their 14nm node instead of 7nm for density/power.

What's happening is asic improvement is already close to it's tail finish. there is solely most space on a chip for warmth. Keep packing it smaller and smaller and that they have to be compelled to get a lot of inventive, unfold everything out father and father. however even that has its limits. inside a couple of years it will be straightforward to aquire AN asic inside ten of the quickest industrial stuff for the maximum amount as an honest gpu, without concern of a 10x replacement popping out next month.

This is speculation on my half however this sort of method (chip design) is progressive to start with, therefor why not place out a batch as presently as you have got one thing marketable?

Not such as you would stop your R&D effort anyways, therefore would possibly also lock in some revenue, right? It's one in every of those "perfect gets within the manner of progress" things IMO.

Interesting. I suppose Bitmain simply got lazy and set to not do a 10nm style. they are in all probability skipping straight to 7nm. Not too surprising; they (and everybody else except KNC) additionally skipped the 20nm node.

No, the opposite ASICs (including blake2b, X11, ethash, and cryptonight) ar all 16nm, AFAIK

Yes, it's obtaining terribly previous however i am afraid that Bitmain has very little incentive to unleash the S11 anytime presently. They currently have tremendous shopping for power at TSMC that permits them to stay creating S9's for cheap , so they will wage value wars and sell them for as very little as few hundred bucks, to stay a competitive edge against superior technology from competitors... All the whereas, they have interaction in ASIC growth into new algos, wherever per-mining before in public saying the existence of the new ASIC is very moneymaking for them... example; throughout Gregorian calendar month and Jan, every Antminer X3 was creating anyplace from 1000~1300 USD per day... every A3 was creating 500~600 USD per day, and UN agency is aware of however long that they had the E3 running before they declared it... appears like they're forgetting USA, the SHA256 and Scrypt miners, those that created them wealthy af within the 1st place... shame.

We don't have verifiable numbers however, however several things will go "wrong" with a injury edge method. One rationalization might be low yield, that still ends up in usable chips however at lower performance. Fabs would like iterations to regulate a brand new method to optimum, it's ne'er excellent from begin. Mining ASICs ar an honest take a look at vehicle for that, as a result of {they ar|they're} created at high volume and are usable with defects (because defect cores is disabled or ignored). once the fabulous has noted their method to optimum, the 10nm ASICs ought to show a major improvement in each, power potency and producing price over 16nm chips.

It's not testing, it is a quite common observe within the semiconductor business to sell risk production as totally tested and verified chips. Low yield simply suggests that some of the chip has defects, however the opposite portion is totally purposeful that leaves a chip with degraded performance.

Samsung has no 7nm chip production however. Samsung has simply finished the event of the 7nm chip method and has begun to organize its lines for production. therefore 10nm isn't behind.

I would have thought that after you have got your circuit designed, the method can either create it dead or wrong. You take a look at it and if it doesn't fail then is QC passed. New processes generate a bigger range of QC fails , however those that pass the take a look at ought to be performant

Clock and warmth dissipation enter here as a result of i assume that energy dissipation will solely be confirmed once the ASICs ar created, you'll be able to have estimations supported the drafting board however the particular numbers come back from testing. i feel the businesses, once they get a operating model, they tweak the clock up/down to create certain the chips work on the utmost operative temperature. i'd be wrong although