• Sign in
  • Sign up 
  • Welcome
  • FAQ
  • Block Explorer 
  • Night Mode
  • Stolen Accounts Recovery 
  • Change Account Password 
  • Vote for Witnesses 
  • Hive Proposals 
  • OpenHive Chat 
  • Developer Portal 
  • Hive Whitepaper 
  • Privacy Policy
  • Terms of Service
logo
  • Posts
  • Proposals
  • Witnesses
  • Our dApps
LoginSign up

VHDL sintetizable IP's for FPGA/ASIC implementation.

morgothcreator (25)in #programming • 8 years ago

Here are a bunch of IP's like UART, SPI, I2C  and other IP's useful to make projects be made faster.

I provide the link to the github project until steemit will provide a platform for file storage.

 You can read download even contribute with code here.

 I hope to be useful for someone :) 

#vhdl #ip #fpga #asic
8 years ago in #programming by morgothcreator (25)
$0.00
    2 votes
    • kostaslou
    • ubg
    Reply 0
    Sort:  
  • Trending
    • Trending
    • Votes
    • Age